Looking at cable models, an interesting expression was found. Though approximate and using ” typical cable parameters” it can be used to at least get a feel for the challenges of transmitting high speed data down a UTP cable. The expression is: f3db = 2.25E4/(d*d). Here d is the length of the cable in Km. From this an interesting conclusion can be drawn. The bandwidth of this “typical” cable of length 100 Meters is only 2.25 Mhz. At the other extreme, a 1 Meter cable will have a 22.5 GHz of bandwidth. A 10 Meter cable will have a bandwidth of 225 Mhz and so on. So if we need to transmit data at high MHz or low GHz speeds, on a longer cable, then there is no option except to design and use an equalizer. This is of course a whole new ball game with many issues. From an initial assessment it appears that an analog equalizer is the best option here. The design is understandable and the technology is available to implement it in a reasonable amount of cost, time and space on an ASIC as needed.

Having become accustomed to clicking icons on a simulator to get fast readings of average and rms values, power values etc we were startled to find that we could not easily compute effective and/or average values of arbitrary waveforms to crosscheck simulation results. So we decided it was time to re-visit the so called ” text book ” definitions and see what we come up with and re-educate ourselves. It is often the bare essentials that seem to trip us up sometimes. So after a fairly close look we documented, in a workbook fashion, our findings, just in case we need them from time to time. This little report is available on our website under engineer’s corner/engineering pages. For interested readers it is located at www.signalpro.biz.

We are all familiar with the MOSFET. Some of us are also very familiar with JFETs.
However, there are a number of transistor types that are not so common. One of these is the DMOS transistor or double diffused MOS transistor. In recent years the DMOS transistor has been used more and more to provide high voltage capability to analog and mixed signal IC designers. It is very popular in the design of MEMs interfaces where higher voltages are required. Currents are usually not high. DMOS transistors can deliver higher currents but need a larger size. The tradeoff is obvious. The DMOS structure is an interesting one. For further detailed information please go to our website, www.signalpro.biz and take a look at the DMOS tutorial article in the engineering pages.

An analysis of several success factors in analog/mixed signal/RF ASIC design and manufacture turned up a number of interesting facts. There were many reasons for success that have been already described elsewhere in this blog. However, the interplay of relationships and their impact on the success of ASIC design and development was not touched. Much to our surprise the analysis of over 100 ASIC projects executed in SPG indicated that when significant success was achieved, not only were the obvious success factors present ( see the blog entry) but a key factor was the customer interface. (1) The customer interface was a technical person who was really closely involved in the design from the system side; (2) the technology that was being used to implement the ASIC was an excellent fit to the requirements; (3) the fabrication vendor relationship was strong and close with SPG; then the probability of clear success was over 99% (conservatively). We did not find a single failure in our list of 100 projects when these conditions were also met. ( In addition to the success factors quoted elsewhere in this blog. The very first entry in the blog since its inception). Thus the objective of this entry is to add this success factor to the list. The search for success in the analog/mixed signal/RF ASIC design and development is critical for our success.