High frequency PCB design Tip #10

RF PCB design is a bit of an art. It is also unforgiving unless done right. Here are one or two tips from a senior RF designer: (1) At a minimum make sure that there is an unbroken ground plane. (2) Keep all traces as short as possible. Remember long thin traces are high inductances and can cause problems at high frequencies. (3) Keep power line traces as wide as possible. (4) Put in RC filtering in any switching power supply output leads. (5) Keep any noisy leads away from inputs and crystal leads,(6) Keep output leads away from input leads or risk oscillation.
(7) Use plenty of ground vias or ground fences. ‘Nuff said..

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

90 Degree microstrip trace bend L and C equivalents

As indicated in an earlier post when a microstrip trace bends at 90 Degrees it effectively generates a parasitic inductor and two parasitic capacitances at the site of the bend.. This may not be a big problem at low frequencies or at low power but as the frequency rises these parasitics can give rise to erroneous operation. A javascript/HTML calculator is available for quick calculations and can be found on the Signal Processing Group Inc., website at http://www.signalpro.biz/bend_lc_calc.html. 

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

Effect of a right angled bend in a PCB trace or microstrip

It is not uncommon to use right angled bends in using PCB traces or microstrip lines. The effect of this type of geometery on the characteristics of the microstrip or trace is to generate a capacitance from the bend to the ground plane and two inductances. One at the input side of the trace and the other at the output side of the trace with respect to the right angled bend. This effect is explored more fully in the accompanying brief paper by Signal Processing Group Inc.’s technical team. For further reading please access this paper at http://www.signalpro.biz/rtangle.pdf.

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

Current carrying capability of a PCB trace

In designing a PCB the question of how much current a trace can carry is common. Many web based calculators are available to do this quickly. The actual mathematics is more or less hidden. Sometimes it may become important to look at the equation that generates these results so that the mathematics can be used in multiple forms to extract multiple parameters. For interested users this expression is provided in a very brief paper at http://www.signalpro.biz/tracecurrent.pdf.  

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

Current carrying cabability of a via on a PCB

How much current can a via on a PCB carry? This is a question the designer has to answer when designing circuits that may be current intensive such as DC – DC converters, regulators, power amplifiers, etc. One can use a very detailed analysis to do this, or use a rule of thumb that says, that the current carrying capability of a via with an internal diameter of X, is approximately 3 times the current carrying capability of a trace with the same width X.

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

Ground loops — brief post

Ground loops are best avoided by connecting all current return paths in the circuit to a common ground point directly. In the same way as common power supplies are connected to a common supply point. This type of connection prevents in circuit noise, interference and radiated noise.

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

PCB design for high frequency circuits

PCB design for high frequencies deserves special treatment as all those who have ever done it know well. One of the pitfalls is the neglect of using correct sizes of trace lengths/widths or ignoring the effects of not using these numbers. So to summarize: every trace on the board has a resistance which will generate spurious response if not taken into account and corrected for ( very tedious after the first iteration layout). Every trace will have a characteristic impedance associated with it so reflections will be there whether we like it or not. In some really bad cases ( and the author has had experience of it) reflections can actually latch an IC believe it or not, and burn it. So Zo should be taken into account  Many, many scripts are available on the web for calculating this ( although a number of them can only do it for a limited lower end of width/substrate thickness ratio ( script fails for W/H < 0.1). Also trace inductance can become a real issue in some cases. So using the same scripts as mentioned above the capacitance of the trace/unit length can be calculated and the inductance extracted from the Zo number and the calculated capacitance number through the basic equation of Zo ( ideal case) , Zo=sqrt( L/C). For more information and other items of interest please go to our website at http://www.signalpro.biz.

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

Be careful when choosing ICs with strange crystal frequencies.

It seems quite simple when one thinks of choosing a frequency to operate ones crystal oscillator for timing, PLLs etc. However, apart from the obvious issues associated with the actual operation of the circuit it becomes important to select a crystal frequency that is relatively easy to source. For instance we have a RF transmitter and a RF receiver. This time we chose these off the shelf instead of developing our own chip. The transmitter has a crystal frequency of 14.3 Mhz. This is an easy one to source. Digikey has a number of these crystals for immediate delivery. However, the receiver crystal frequency is specified as 14.464063 Mhz. This is a killer. We cannot source this crystal easily. There is a long wait for it and many dollars for development. So we are now in a predicament. After much deliberation we are going with a crystal oscillator dissipating 32 mA for our first demo system. The issue is that the battery will be discharged very quickly. The search for the correct crystal continues…

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

Negative resistances and the Extended Smith Chart.

The standard Smith chart is usually designed to accommodate reflection coefficient values of 1.0. However, in certain cases this may not be the case. For instance in problems of negative resistance manipulations using the Smith Chart. When this is the case an extended Smith Chart can be drawn for any value of the reflection coefficient. This chart can then be used in the same way as the standard chart. Of course if the values of the negative resistance become too large then these can lead to impractical circuits.

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.

Ceramic capacitor markings for values, tolerance etc.


Ceramic capacitor marking can be cryptic if one is not a regular user. The following describes the EIA marking codes for ceramic capacitors. The first of the 3 codes is of the form, Z5U; Here Z is the code for minimum temperature. If Z = X then temperature is -55 Deg C, if Y then, -30 Deg C and if Z, then +10 Deg C. The second set of codes are of the form 564K . The first two digits indicate the value of the capacitor in pF. The third digit indicates the number of zeroes after the first two digits. These two actually indicate the value. For example, the above code means that the value of the capacitor is 580000 pF = 0.58 uF. The last indicator is the tolerance code.  C means + or – 0.25pF, D means + or – 0.5pF, F means + or – 1pF, G means + or – 2pF, J means + or – 5%, K means + or – 10%, L means + or – 15%, M means + or – 20%, P means 0% to +100%, W means -20% to +40%, Y means -20% to +50%, Z means -20% to 80%. If the value is less than 10pF then actual tolerance number is used. If the value is greater than 10pF percentage is used. Please visit http://www.signalpro.biz for more information on analog and RF/wireless design and development.

We design and deliver analog and RF/wireless ASICs and modules using state of the art semiconductor, PCB and assembly technologies. Please contact us at spg@signalpro.biz for a quote and a proposal.