Bond wires can have a significant effect on the performance of Integrated circuits. High frequency and high power circuits are more susceptible but almost all circuits can be affected. It is therefore prudent to look at the models of bond wires and include these effects in the top level chip design simulations. (The effect of the complete package is also important and can be modeled using “Touchstone” files. See the description and use of these files elsewhere in this blog and the SPG website at http://www.signalpro.biz) . A recent brief paper on bond wire parameter models may be found on the SPG website at http://www.signalpro.biz under the “Download …” menu item.