A PLL has multiple phases of operation. One of the early phases is the acquisition of a signal and lock-in to its VCO frequency. This behavior is complex and hard to specify exactly using analytical expressions. However, a number of approximate expressions have been derived that can form the starting point of numerical, iterative analysis. Failing this, it becomes very difficult to even start the design of a PLL. In a recent paper released by Signal Processing Group Inc., these fundamental expressions are examined and presented for interested readers. Please visit the SPG website and use the “complementary” link to access this paper.